High Convergence Rates of CMOS Invertible Logic Circuits Based on Many-Body Hamiltonians
Naoya Onizawa, Takahiro Hanyu
This paper introduces CMOS invertible-logic (CIL) circuits based on many-body Hamiltonians. CIL can realize probabilistic forward and backward operations of a function by annealing a corresponding Hamiltonian using stochastic computing. We have created a Hamiltonian that includes three-body interaction of spins (probabilistic nodes). It provides some degrees of freedom to design a simpler landscape of Hamiltonian (energy) than that of the conventional two-body Hamiltonian. The simpler landscape makes it easier to reach the global minimum energy. The proposed three-body CIL circuits are designed and evaluated with the conventional two-body CIL circuits, resulting in few-times higher convergence rates with negligible area overhead on FPGA.
Leveraging Large Reconfigurable Intelligent Surfaces as Anchors for Near-Field Positioning
Zeyu Huang, Markus Rupp, Stefan Schwarz
In this work, we present a recent investigation on leveraging large reconfigurable intelligent surfaces (RIS) as anchors for positioning in wireless communication systems. Unlike existing approaches, we explicitly address the uncertainty arising from the substantial physical size of the RIS, particularly relevant when a user equipment resides in the near field, and propose a method that ensures accurate positioning under these conditions. We derive the corresponding Cramer-Rao bound for our scheme and validate the effectiveness of our scheme through numerical experiments, highlighting both the feasibility and potential of our approach.
Quantum-Inspired Artificial Bee Colony for Latency-Aware Task Offloading in IoV
Mamta Kumari, Mayukh Sarkar, Rohit Kumar Nonia
Efficient task offloading is crucial for reducing latency and ensuring timely decision-making in intelligent transportation systems within the rapidly evolving Internet of Vehicles (IoV) landscape. This paper introduces a novel Quantum-Inspired Artificial Bee Colony (QABC) algorithm specifically designed for latency-sensitive task offloading involving cloud servers, Roadside Units (RSUs), and vehicular nodes. By incorporating principles from quantum computing, such as quantum state evolution and probabilistic encoding, QABC enhances the classical Artificial Bee Colony (ABC) algorithm's ability to avoid local optima and explore high-dimensional solution spaces. This research highlights the potential of quantum-inspired heuristics to optimize real-time offloading strategies in future vehicular networks.
Design and development of opto-neural processors for simulation of neural networks trained in image detection for potential implementation in hybrid robotics
Sanjana Shetty
Neural networks have been employed for a wide range of processing applications like image processing, motor control, object detection and many others. Living neural networks offer advantages of lower power consumption, faster processing, and biological realism. Optogenetics offers high spatial and temporal control over biological neurons and presents potential in training live neural networks. This work proposes a simulated living neural network trained indirectly by backpropagating STDP based algorithms using precision activation by optogenetics achieving accuracy comparable to traditional neural network training algorithms.
A Computer-Supported Collaborative Learning Environment for Computer Science Education
Michael Holly, Jannik Hildebrandt, Johanna Pirker
Skills in the field of computer science (CS) are increasingly in demand. Often traditional teaching approaches are not sufficient to teach complex computational concepts. Interactive and digital learning experiences have been shown as valuable tools to support learners in understanding. However, the missing social interaction affects the quality of the learning experience. Adding collaborative and competitive elements can make the virtual learning environment even more social, engaging, and motivating for learners. In this paper, we explore the potential of collaborative and competitive elements in an interactive virtual laboratory environment with a focus on computer science education. In an AB study with 35 CS students, we investigated the effectiveness of collaborative and competitive elements in a virtual laboratory using interactive visualizations of sorting algorithms.
Acceleration of digital memcomputing by jumps
Yuriy V. Pershin
In this article, we present the potential benefits of incorporating jumps into the dynamics of digital memcomputing machines (DMMs), which have been developed to address complex optimization problems. We illustrate the potential speed improvement of a DMM solver with jumps over an unmodified DMM solver by solving Boolean satisfiability (SAT) problems of different complicatedness. Our findings suggest that jumps can modify scaling exponents and improve solving times by up to 75 %. Interestingly, the advantages of jumps can be seen in cases where the size of the jump is so large that otherwise the continuous dynamics of voltage variables becomes almost binary.
SPICE Modeling of Memcomputing Logic Gates
Y. V. Pershin
Memcomputing logic gates generalize the traditional Boolean logic gates for operation in the reverse direction. According to the literature, this functionality enables the efficient solution of computationally-intensive problems including factorization and NP-complete problems. To approach the deployment of memcomputing gates in hardware, this paper introduces SPICE models of memcomputing logic gates following their original definition. Using these models, we demonstrate the behavior of single gates as well as small self-organizing circuits. We also correct some inconsistencies in the prior literature. Importantly, the correct schematics of dynamic correction module is reported here for the first time. Our work makes memcomputing more accessible to those who are interested in this emerging computing technology.
en
cs.ET, cond-mat.dis-nn
Limits to the Energy Efficiency of CMOS Microprocessors
Anson Ho, Ege Erdil, Tamay Besiroglu
CMOS microprocessors have achieved massive energy efficiency gains but may reach limits soon. This paper presents an approach to estimating the limits on the maximum floating point operations per Joule (FLOP/J) for CMOS microprocessors. We analyze the three primary sources of energy dissipation: transistor switching, interconnect capacitances and leakage power. Using first-principles calculations of minimum energy costs based on Landauer's principle, prior estimates of relevant parameters, and empirical data on hardware, we derive the energy cost per FLOP for each component. Combining these yields a geometric mean estimate of 4.7e15 FP4/J for the maximum CMOS energy efficiency, roughly two hundred-fold more efficient than current microprocessors.
Spiking frequency modulation of proteinoids with light and realisation of Boolean gates
Panagiotis Mougkogiannis, Andrew Adamatzky
This paper examines the modulation of proteinoid spiking frequency in response to light. Proteinoids are proteins formed through thermal condensation of amino acids and have been found to exhibit spiking behaviour in response to various stimuli. It has been demonstrated that their properties can be modulated by light, with the frequency of spikes changing in response to varying light intensity and wavelength. This paper explores the underlying mechanisms of this phenomenon, including how light affects the proteinoid's structure and its effect on the spiking frequency. We also discuss the potential implications of this modulation for future research and applications. Our research findings suggest that light could be used as a tool to regulate the spiking frequency of proteinoids, opening up a new range of possibilities for unconventional computing research.
Verification of crossbar-based lattice through modeling technique
Rajesh Kumar Datta
The use of Nano crossbar-based switching lattice implementation of Boolean functions has been proposed as an alternative to traditional CMOS-based implementations in digital circuits. As Moore law is expected to come to an end soon, the use of crossbar-based switching lattice implementation may be a solution to meet the demands of future electronic designs. In recent years, various methods and tools have been proposed for implementing boolean functions with crossbar structures. In this work, a method for verifying crossbar-based lattice has been proposed and implemented. This kind of verification will be necessary for any design that utilizes this crossbar-based implementation of boolean logic.
QHDL: a Low-Level Circuit Description Language for Quantum Computing
Gilbert Netzer, Stefano Markidis
This paper proposes a descriptive language called QHDL, akin to VHDL, to program gate-based quantum computing systems. Unlike other popular quantum programming languages, QHDL targets low-level quantum computing programming and aims to provide a common framework for programming FPGAs and gate-based quantum computing systems. The paper presents an initial implementation and design principles of the QHDL framework, including a compiler and quantum computer simulator. We discuss the challenges of low-level integration of streaming models and quantum computing for programming FPGAs and gate-based quantum computing systems.
Spin-Hall MTJ Cells for Intra-Column Competition in Hierarchical Temporal Memory
Andrew W. Stephan, Steven J. Koester
We propose a dedicated winner-take-all circuit to efficiently implement the intra-column competition between cells in Hierarchical Temporal Memory which is a crucial part of the algorithm. All inputs and outputs are charge-based for compatibility with standard CMOS. The circuit incorporates memristors for competitive advantage to emulate a column with a cell in a predictive state. The circuit can also detect columns 'bursting' by passive averaging and comparison of the cell outputs. The proposed spintronic devices and circuit are thoroughly described and a series of simulations are used to predict the performance. The simulations indicate that the circuit can complete a nine-cell, nine-input competition operation in under 15 ns at a cost of about 25 pJ.
Embracing the Unreliability of Memory Devices for Neuromorphic Computing
Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein
et al.
The emergence of resistive non-volatile memories opens the way to highly energy-efficient computation near- or in-memory. However, this type of computation is not compatible with conventional ECC, and has to deal with device unreliability. Inspired by the architecture of animal brains, we present a manufactured differential hybrid CMOS/RRAM memory architecture suitable for neural network implementation that functions without formal ECC. We also show that using low-energy but error-prone programming conditions only slightly reduces network accuracy.
Simphony: An open-source photonic integrated circuit simulation framework
Sequoia Ploeg, Hyrum Gunther, Ryan M. Camacho
We present Simphony, a free and open-source software toolbox for abstracting and simulating photonic integrated circuits, implemented in Python. The toolbox is both fast and easily extensible; plugins can be written to provide compatibility with existing layout tools, and device libraries can be easily created without a deep knowledge of programming. We include several examples of photonic circuit simulations with novel features and demonstrate a speedup of more than 20x over a leading commercially available software tool.
Emulation of Astrocyte Induced Neural Phase Synchrony in Spin-Orbit Torque Oscillator Neurons
Umang Garg, Kezhou Yang, Abhronil Sengupta
Astrocytes play a central role in inducing concerted phase synchronized neural-wave patterns inside the brain. In this article, we demonstrate that injected radio-frequency signal in underlying heavy metal layer of spin-orbit torque oscillator neurons mimic the neuron phase synchronization effect realized by glial cells. Potential application of such phase coupling effects is illustrated in the context of a temporal "binding problem". We also present the design of a coupled neuron-synapse-astrocyte network enabled by compact neuromimetic devices by combining the concepts of local spike-timing dependent plasticity and astrocyte induced neural phase synchrony.
BacSoft: A Tool to Archive Data on Bacteria
Amay Agrawal, Dixita Limbachiya, Ravikumar M.
et al.
Recently, DNA data storage systems have attracted many researchers worldwide. Motivated by the success stories of such systems, in this work we propose a software called BacSoft to clone the data in a bacterial plasmid by using the concept of genetic engineering. We consider the encoding schemes such that it satisfies constraints significant for bacterial data storage.
Reversible Logic Circuit Complexity Analysis via Functional Decomposition
Anupam Chattopadhyay, Anubhab Baksi
Reversible computation is gaining increasing relevance in the context of several post-CMOS technologies, the most prominent of those being Quantum computing. One of the key theoretical problem pertaining to reversible logic synthesis is the upper bound of the gate count. Compared to the known bounds, the results obtained by optimal synthesis methods are significantly less. In this paper, we connect this problem with the multiplicative complexity analysis of classical Boolean functions. We explore the possibility of relaxing the ancilla and if that approach makes the upper bound tighter. Our results are negative. The ancilla-free synthesis methods by using transformations and by starting from an Exclusive Sum-of-Product (ESOP) formulation remain, theoretically, the synthesis methods for achieving least gate count for the cases where the number of variables $n$ is $< 8$ and otherwise, respectively.
An Energy-Efficient VCO-Based Matrix Multiplier Block to Support On-Chip Image Analysis
Imon Banerjee, Arindam Sanyal
Images typically are represented as uniformly sampled data in the form of matrix of pixels/voxels. Therefore, matrix multiply-and-accumulate (MAC) forms the core of most state-of-the-art image analysis algorithms. While digital implementation of MAC has generally been the preferred approach, high power consumption is an impediment to adopting it for medical image analysis. In this work, we present a time-domain signal processing architecture which performs MAC operations with 7bit accuracy while consuming 400X lower energy than digital implementation. The proposed architecture performs analog computation using mostly digital circuits and is suitable for scaled CMOS technologies. The proposed time-domain MAC architecture is expected to play a central role in empowering the advancement of various on-chip image analysis operations.
Magnetic Tunnel Junction Mimics Stochastic Cortical Spiking Neurons
Abhronil Sengupta, Priyadarshini Panda, Parami Wijesinghe
et al.
Brain-inspired computing architectures attempt to mimic the computations performed in the neurons and the synapses in the human brain in order to achieve its efficiency in learning and cognitive tasks. In this work, we demonstrate the mapping of the probabilistic spiking nature of pyramidal neurons in the cortex to the stochastic switching behavior of a Magnetic Tunnel Junction in presence of thermal noise. We present results to illustrate the efficiency of neuromorphic systems based on such probabilistic neurons for pattern recognition tasks in presence of lateral inhibition and homeostasis. Such stochastic MTJ neurons can also potentially provide a direct mapping to the probabilistic computing elements in Belief Networks for performing regenerative tasks.
Self-Inverse Functions and Palindromic Circuits
Mathias Soeken, Michael Kirkedal Thomsen, Gerhard W. Dueck
et al.
We investigate the subclass of reversible functions that are self-inverse and relate them to reversible circuits that are equal to their reverse circuit, which are called palindromic circuits. We precisely determine which self-inverse functions can be realized as a palindromic circuit. For those functions that cannot be realized as a palindromic circuit, we find alternative palindromic representations that require an extra circuit line or quantum gates in their construction. Our analyses make use of involutions in the symmetric group $S_{2^n}$ which are isomorphic to self-inverse reversible function on $n$ variables.