The protocols of distributed consensus normally aim to tolerate different types of faults including crash faults and byzantine faults that occur in the distributed systems. However, the dynamic network topology and stochastic wireless channels may cause the same trustworthy system to suffer both crash fault and byzantine fault. This article proposes the concept of a distributed consensus autonomous switch mechanism in trustworthy autonomous systems (D-CAST) to reach the different fault tolerance requirements of the dynamic nodes and discusses the challenges of D-CAST while it is implemented in the wireless trustworthy system.
Nicolas Bousquet, Laurent Feuilloley, Théo Pierron
In this paper, we investigate how local rules enforced at every node can influence the topology of a network. More precisely, we establish several results on the diameter of trees as a function of the number of nodes, as listed below. These results have important consequences on the landscape of locally checkable labelings (LCL) on \emph{unbounded} degree graphs, a case in which our lack of knowledge is in striking contrast with that of \emph{bounded degree graphs}, that has been intensively studied recently. [See paper for full abstract.]
Antony Chazapis, Evangelos Maliaroudakis, Fotis Nikolaidis
et al.
The escalating complexity of applications and services encourages a shift towards higher-level data processing pipelines that integrate both Cloud-native and HPC steps into the same workflow. Cloud providers and HPC centers typically provide both execution platforms on separate resources. In this paper we explore a more practical design that enables running unmodified Cloud-native workloads directly on the main HPC cluster, avoiding resource partitioning and retaining the HPC center's existing job management and accounting policies.
En este trabajo se realiza la implementación de observadores de estado en una plataforma integrada que combina Matlab®, Simulink® y Arduino®, mediante la cual se logra estimar con precisión las variables de estado de un convertidor electrónico. La planta es emulada en Matlab - Simulink, mientras que los observadores son implementados en Arduino. Para ello, se diseñan tres tipos de observadores: el observador de Luenberger, el filtro de Kalman y el observador por modos deslizantes, para un convertidor DC-DC boost. Los resultados son evaluados, permitiendo resaltar sus ventajas y desventajas para la obtención de las variables de estado del convertidor. La metodología utilizada ha demostrado ser fácilmente reproducible, lo que abre la posibilidad de futuras investigaciones y aplicaciones prácticas en el campo de la electrónica de potencia y el control} n this work, the implementation of state observers in an integrated platform combining Matlab, Simulink and Arduino is carried out, by means of which the state variables of an electronic converter can be accurately estimated. For this purpose, three types of estimators are designed: the Luenberger observer, the Kalman filter and the sliding mode observer, for a DC/DC boost converter. The estimators are evaluated, allowing to highlight their advantages and disadvantages for obtaining the state variables of the converter. The methodology used has proved to be easily reproducible, which opens the possibility of future research and practical applications in the field of power electronics and control.
We introduce a new model for the task mapping problem to aid in the systematic design of algorithms for heterogeneous systems including, but not limited to, CPUs, GPUs and FPGAs. A special focus is set on the communication between the devices, its influence on parallel execution, as well as on device-specific differences regarding parallelizability and streamability. We show how this model can be utilized in different system design phases and present two novel mixed-integer linear programs to demonstrate the usage of the model.
With the rising potential for the employment of low- and medium-voltage direct-current (dc) electric power distribution systems, most notably for a more efficient integration of plug-in electric vehicles and such other distributed energy resources as photovoltaic (PV) panels, there is a need for robust ac/dc electronic power converters that can interface such dc distribution systems with the legacy alternating current (ac) power system. Thus, this thesis proposes a new single-stage low-voltage three-phase ac-dc power converter that is simple structurally, en- ables a bidirectional power exchanges between the ac and dc distribution systems, and can handle short-circuit faults at its dc as well as ac sides. The proposed converter consists of three legs, corresponding to the three phases of the host ac grid, each of which hosting two full-bridge submodule (FBSM), in an architecture that can be regarded as a special case of the so-called modular multi-level converter (MMC). Thus, at the dc port each FBSM is connected in parallel with a corresponding capacitor, while the ac voltage of each phase is synthesized by the coordinated sinusoidal pulse-width modulation (SPWM) of the two corresponding FBSMs. This architecture allows the generation of low-distortion ac voltage while it also provides the converter with the very important dc fault current blocking capability since, upon the detection of a short circuit across the converter dc port, the switches of the FBSMs are turned off and disallow the flow of any dc current. The thesis also presents a mathematical model for the converter, for analysis and control design purposes. Thus, the control for the regulation of the overall dc-side voltage, as well as those for the regulation of the dc voltages of the FBSMs are devised based on the aforementioned mathematical model and presented with details. It is further shown that the voltage conversion ratio of the proposed converter is the same as that offered by a conventional voltage-sourced converter (VSC), whereas the VSC is vulnerable to dc- side shorts. The proposed converter can be extended to medium-voltage levels by multi- plying the number of FBSMs in each leg. The effectiveness of the proposed converter and its controls is demonstrated through time-domain simulation studies conducted on a topological model of the converter in PSCAD/EMTDC software environment.
In this paper, we derive and investigate approaches to dynamically load balance a distributed task parallel application software. The load balancing strategy is based on task migration. Busy processes export parts of their ready task queue to idle processes. Idle--busy pairs of processes find each other through a random search process that succeeds within a few steps with high probability. We evaluate the load balancing approach for a block Cholesky factorization implementation and observe a reduction in execution time on the order of 5\% in the selected test cases.
Load balancing algorithms play critical roles in systems where the workload has to be distributed across multiple resources, such as cores in multiprocessor system, computers in distributed computing, and network links. In this paper, we study and evaluate four load balancing methods: random, round robin, shortest queue, and shortest queue with stale load information. We build a simulation model and compare mean delay of the systems for the load balancing methods. We also provide a method to improve shortest queue with stale load information load balancing. A performance analysis for the improvement is also presented in this paper.
Sergio Rivas-Gomez, Stefano Markidis, Ivy Bo Peng
et al.
This work presents an extension to MPI supporting the one-sided communication model and window allocations in storage. Our design transparently integrates with the current MPI implementations, enabling applications to target MPI windows in storage, memory or both simultaneously, without major modifications. Initial performance results demonstrate that the presented MPI window extension could potentially be helpful for a wide-range of use-cases and with low-overhead.
This paper addresses the problem of non-Bayesian learning over multi-agent networks, where agents repeatedly collect partially informative observations about an unknown state of the world, and try to collaboratively learn the true state. We focus on the impact of the adversarial agents on the performance of consensus-based non-Bayesian learning, where non-faulty agents combine local learning updates with consensus primitives. In particular, we consider the scenario where an unknown subset of agents suffer Byzantine faults -- agents suffering Byzantine faults behave arbitrarily. Two different learning rules are proposed.
Sorting and scanning are two fundamental primitives for constructing highly parallel algorithms. A number of libraries now provide implementations of these primitives for GPUs, but there is relatively little information about the performance of these implementations. We benchmark seven libraries for 32-bit integer scan and sort, and sorting 32-bit values by 32-bit integer keys. We show that there is a large variation in performance between the libraries, and that no one library has both optimal performance and portability.
Recently, cloud systems composed of heterogeneous hardware have been increased to utilize progressed hardware power. However, to program applications for heterogeneous hardware to achieve high performance needs much technical skill and is difficult for users. Therefore, to achieve high performance easily, this paper proposes a PaaS which analyzes application logics and offloads computations to GPU and FPGA automatically when users deploy applications to clouds.
In this paper we present and evaluate a parallel algorithm for solving a minimum spanning tree (MST) problem for supercomputers with distributed memory. The algorithm relies on the relaxation of the message processing order requirement for one specific message type compared to the original GHS (Gallager, Humblet, Spira) algorithm. Our algorithm adopts hashing and message compression optimization techniques as well. To the best of our knowledge, this is the first parallel implementation of the GHS algorithm that linearly scales to more than 32 nodes (256 cores) of Infiniband cluster.
Gustavo R. L Silva, Rafael R. Medeiros, Antonio P. Braga
et al.
This work presents a new clustering algorithm, the GPIC, a Graphics Processing Unit (GPU) accelerated algorithm for Power Iteration Clustering (PIC). Our algorithm is based on the original PIC proposal, adapted to take advantage of the GPU architecture, maintining the algorith original properties. The proposed method was compared against the serial and parallel Spark implementation, achieving a considerable speed-up in the test problems.
We present IKAROS as a utility that permit us to form scalable storage platforms. IKAROS enable us to create ad-hoc nearby storage formations and use a huge number of I/O nodes in order to increase the available bandwidth. We measure the performance and scalability of IKAROS versus the IBMs General Parallel File System (GPFS) under a variety of conditions. The measurements are based on benchmark programs that allow us to vary block sizes and to measure aggregate throughput rates.