Hasil untuk "Architecture"

R. K. Sah, Joseph E. Stiglitz

T. Wickiewicz, R. Roy, P. Powell et al.

R. Greenbaum, S. Ho, D. Gibson et al.

N. Hutchinson, L. Peterson

J. Welles, J. Norman

P. Yurchenco, J. Schittny

D. Luckham, J. Kenney, L. M. Augustin et al.

A. Watson

D. Bradley, O. Ratcliffe, C. Vincent et al.

D. Mumford

Henry Jenkins

E. Weizman

Miao Wu, Tingjie Lu, Fei-Yang Ling et al.

U. Enste, W. Mahnke

Zusammenfassung OPC Unified Architecture bietet erweiterte Möglichkeiten der Interoperabilität. Auf Basis eines objekt-orientierten Konzeptes stehen moderne Mittel zur Informationsmodellierung zur Verfügung, um den über Schnittstellen zur Verfügung zu stellenden Datenhaushalt eines Systems repräsentieren zu können. Mit Hilfe einer Kommunikationsinfrastruktur werden darüber hinaus eine Systemarchitektur und generische Dienstevorgaben gemacht. Abstract OPC Unified Architecture offers extended functionalities to realize interoperability between different systems. Based on object-oriented concepts, modern means for information modelling are available to represent the data base of a system, which should be shareable via an OPC UA interface. In addition to the information modelling aspects, OPC UA specifies a communication infrastructure by defining generic services and a system architecture.

P. Feiler, D. Gluch, J. Hudak

James E. Smith, R. Nair

W. Ren, N. Sorensen

Ian Kuon, R. Tessier, Jonathan Rose

R. Moskowitz, P. Nikander

Xinyu Shi, Simei Yang, Francky Catthoor

Edge and mobile platforms for augmented and virtual reality, collectively referred to as extended reality (XR) must deliver deterministic ultra-low-latency performance under stringent power and area constraints. However, the diversity of XR workloads is rapidly increasing, characterized by heterogeneous operator types and complex dataflow structures. This trend poses significant challenges to conventional accelerator architectures centered around convolutional neural networks (CNNs), resulting in diminishing returns for traditional compute-centric optimization strategies. Despite the importance of this problem, a systematic architectural understanding of the full XR pipeline remains lacking. In this paper, we present an architectural classification of XR workloads using a cross-layer methodology that integrates model-based high-level design space exploration (DSE) with empirical profiling on commercial GPU and CPU hardware. By analyzing a representative set of workloads spanning 12 distinct XR kernels, we distill their complex architectural characteristics into a small set of cross-layer workload archetypes (e.g., capacity-limited and overhead-sensitive). Building on these archetypes, we further extract key architectural insights and provide actionable design guidelines for next-generation XR SoCs. Our study highlights that XR architecture design must shift from generic resource scaling toward phase-aware scheduling and elastic resource allocation in order to achieve greater energy efficiency and high performance in future XR systems.