DOAJ Open Access 2025

Design and Hardware Implementation of a Highly Flexible PRNG System for NIST-Validated Pseudorandom Sequences

María de Lourdes Rivas Becerra Juan José Raygoza Panduro Edwin Christian Becerra Alvarez Susana Ortega Cisneros José Luis González Vidal

Abstrak

This work presents the design of a system of a highly flexible pseudorandom number generator system (PRNG) incorporating both conventional and neuro-generators. The system integrates four internal generators with different conditions to produce new output sequences with adequate bits distribution and complexity. Two generators function at a frequency of 100 MHz with adjustable frequency settings, while two neuro-generators employ impulse neurons with distinct behaviours at 4 kHz, also modifiable. The proposed system meets 12 statistical randomness standards based on NIST’s (National Institute of Standards and Technology of U. S.) test suite, including the Frequency test, Binary Matrix Rank test, Linear Complexity test, and Random Excursion test, among others. Each resulted in a <i>P-value</i> greater than 0.01, confirming the pseudo-randomness of the generated sequences. The system is implemented on a reconfigurable device FPGA (Field Programmable Gate Array), with a low occupancy percentage, demonstrating its feasibility for various applications.

Penulis (5)

M

María de Lourdes Rivas Becerra

J

Juan José Raygoza Panduro

E

Edwin Christian Becerra Alvarez

S

Susana Ortega Cisneros

J

José Luis González Vidal

Format Sitasi

Becerra, M.d.L.R., Panduro, J.J.R., Alvarez, E.C.B., Cisneros, S.O., Vidal, J.L.G. (2025). Design and Hardware Implementation of a Highly Flexible PRNG System for NIST-Validated Pseudorandom Sequences. https://doi.org/10.3390/chips4020023

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Informasi Jurnal
Tahun Terbit
2025
Sumber Database
DOAJ
DOI
10.3390/chips4020023
Akses
Open Access ✓