Optimization design of insulation and parasitic parameters for medium-voltage hybrid ANPC busbars

The busbar, serving as a critical power transmission component in power electronic converters, fulfills essential functions including interconnection of power devices, capacitors, terminals, and insulation. To mitigate parasitic parameters and device stresses, converter circuits must be integrated through busbars. This paper focuses on the ANPC topology composed of a 15 kV SiC metal oxide semiconductor field effect transistor (SiC MOSFET) and a series-connected 6.5 kV Si insulated gate bipolar transistor (Si IGBT), investigating optimized busbar design through dimensional arrangement, layer stacking sequence, and terminal positioning. A three-dimensional electromagnetic model of medium-voltage multi-device integrated busbars is established using finite element simulation software. Parametric analysis is conducted to optimize device spacing and layer structures, proposing a busbar layout strategy tailored for hybrid ANPC topologies. Simulation results demonstrate that the optimized design effectively reduces system parasitic while validating reasonable electric field distribution under high-frequency switching conditions. Experimental tests on a prototype platform confirm that the optimized busbar exhibits superior insulation performance at critical nodes and enhanced overall reliability compared to conventional designs.