DOAJ Open Access 2020

Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process

Ruibo Chen Hongxia Liu Wenqiang Song Feibo Du Hao Zhang +2 lainnya

Abstrak

Abstract Low-voltage-triggered silicon-controlled rectifier (LVTSCR) is expected to provide an electrostatic discharge (ESD) protection for a low-voltage integrated circuit. However, it is normally vulnerable to the latch-up effect due to its extremely low holding voltage. In this paper, a novel LVTSCR embedded with an extra p-type MOSFET called EP-LVTSCR has been proposed and verified in a 28-nm CMOS technology. The proposed device possesses a lower trigger voltage of ~ 6.2 V and a significantly higher holding voltage of ~ 5.5 V with only 23% degradation of the failure current under the transmission line pulse test. It is also shown that the EP-LVTSCR operates with a lower turn-on resistance of ~ 1.8 Ω as well as a reliable leakage current of ~ 1.8 nA measured at 3.63 V, making it suitable for ESD protections in 2.5 V/3.3 V CMOS processes. Moreover, the triggering mechanism and conduction characteristics of the proposed device were explored and demonstrated with TCAD simulation.

Topik & Kata Kunci

Materials of engineering and construction. Mechanics of materials

Penulis (7)

Ruibo Chen

Hongxia Liu

Wenqiang Song

Feibo Du

Hao Zhang

Jikai Zhang

Zhiwei Liu

Format Sitasi

APA MLA BibTeX

Chen, R., Liu, H., Song, W., Du, F., Zhang, H., Zhang, J. et al. (2020). Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process. https://doi.org/10.1186/s11671-020-03437-3

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Informasi Jurnal

Tahun Terbit: 2020
Sumber Database: DOAJ
DOI: 10.1186/s11671-020-03437-3
Akses: Open Access ✓