Modeling and Evaluating Superconducting Ferroelectric SQUID Circuits

Ferroelectric superconducting quantum interference device (Fe-SQUID) has recently emerged as a viable option to realize superconducting computing due to its voltage-controlled switching, which is essential to build large-scale digital circuits. This is the first work to model Fe-SQUID-based logic circuits and develop standard cell libraries compatible with existing electronic design automation (EDA) tool flows. We provide a comprehensive evaluation of the power consumption and performance of a wide range of Fe-SQUID-based arithmetic circuits, benchmarking them against the state-of-the-art 5 nm fin field-effect transistor (FinFET)-based circuits. Our 5 nm FinFET transistor model is validated against industrial measurements. The validation is conducted not only at room temperature but also at extremely low temperatures, down to 10 K, for fair comparisons against Fe-SQUID superconducting circuits. Our findings revealed that contrary to CMOS-based circuits, circuits realized using Fe-SQUID dissipate significantly more power. This presents a substantial challenge within the constraints of limited cooling power budgets in state-of-the-art cryostats.