Pulse-Engineered Controlled-V Gate and Its Applications on Superconducting Quantum Device

In this article, we demonstrate that, by employing the OpenPulse design kit for IBM superconducting quantum devices, the controlled-V gate (<sc>cv</sc> gate) can be implemented in about half the gate time to the controlled-X gate (<sc>cx</sc> or <sc>cnot</sc> gate) and consequently 65.5&#x0025; reduced gate time compared to the <sc>cx</sc>-based implementation of <sc>cv</sc>. Then, based on the theory of Cartan decomposition, we characterize the set of all two-qubit gates implemented with only two or three <sc>cv</sc> gates; using pulse-engineered <sc>cv</sc> gates, enables us to implement these gates with shorter gate time and possibly better gate fidelity than the <sc>cx</sc>-based one, as actually demonstrated in two examples. Moreover, we showcase the improvement of linearly coupled three-qubit Toffoli gate by implementing it with the pulse-engineered <sc>cv</sc> gate, both in gate time and the averaged output-state fidelity. These results imply the importance of our <sc>cv</sc> gate implementation technique, which, as an additional option for the basis gate set design, may shorten the overall computation time and consequently improve the precision of several quantum algorithms executed on a real device.