Design of XOR and XNOR Based Full Adder Circuits
Abstrak
This paper has a XOR / XNOR gate circuits produces separate and establishes a simultaneous XOR - XNOR function.. Due to stubby yield capacity and short-circuit energy dissipation, the power utilization and latency of these circuits is increasing A new one-bit adder hybrid circuit is chosen built on the effective gates of xor xnor or xor / xnor. Each prefer circuit has its own advantages as it is known for its high speed, low current drain, short delay product (PDP), galvanic ability, etc. Simulations of the planned models were carried out using Mentor Graphics to see the quality of these projects. The simulation results are based on the 130-nm CMOS engineering design. A recent technique of transistor sizing is implemented to improve the circuits ' PDP.
Penulis (10)
Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Vaddeswaram, AP, India.
I.Veeraraghava Rao*
Aditya M
Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Vaddeswaram, AP, India
V Kavya Chowdary
Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Vaddeswaram, AP, India.
K Sai Nishitha
Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Vaddeswaram, AP, India.
V Naveen Sai
Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Vaddeswaram, AP, India.
Akses Cepat
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- 2019
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- en
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- DOI
- 10.35940/ijitee.b7003.129219
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