arXiv
Open Access
2024
Enabling full-speed random access to the entire memory on the A100 GPU
Alden Walker
Abstrak
We describe some features of the A100 memory architecture. In particular, we give a technique to reverse-engineer some hardware layout information. Using this information, we show how to avoid TLB issues to obtain full-speed random HBM access to the entire memory, as long as we constrain any particular thread to a reduced access window of less than 64GB.
Penulis (1)
A
Alden Walker
Akses Cepat
Informasi Jurnal
- Tahun Terbit
- 2024
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- en
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- arXiv
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- Open Access ✓