arXiv Open Access 2024

Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications

Jonas Ney Patrick Matalla Vincent Lauinger Laurent Schmalen Sebastian Randel +1 lainnya
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Abstrak

In this work, we present a high-throughput field programmable gate array (FPGA) demonstrator of an artificial neural network (ANN)-based equalizer. The equalization is performed and illustrated in real-time for a 30 GBd, two-level pulse amplitude modulation (PAM2) optical communication system.

Topik & Kata Kunci

Penulis (6)

J

Jonas Ney

P

Patrick Matalla

V

Vincent Lauinger

L

Laurent Schmalen

S

Sebastian Randel

N

Norbert Wehn

Format Sitasi

Ney, J., Matalla, P., Lauinger, V., Schmalen, L., Randel, S., Wehn, N. (2024). Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications. https://arxiv.org/abs/2402.15288

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2024
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en
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arXiv
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