arXiv Open Access 2023

Benchmarking and modeling of analog and digital SRAM in-memory computing architectures

Pouya Houshmand Jiacong Sun Marian Verhelst

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Abstrak

In-memory-computing is emerging as an efficient hardware paradigm for deep neural network accelerators at the edge, enabling to break the memory wall and exploit massive computational parallelism. Two design models have surged: analog in-memory-computing (AIMC) and digital in-memory-computing (DIMC), offering a different design space in terms of accuracy, efficiency and dataflow flexibility. This paper targets the fair comparison and benchmarking of both approaches to guide future designs, through a.) an overview of published architectures; b.) an analytical cost model for energy and throughput; c.) scheduling of workloads on a variety of modeled IMC architectures for end-to-end network efficiency analysis, offering valuable workload-hardware co-design insights.

Topik & Kata Kunci

cs.AR eess.IV eess.SP

Penulis (3)

Pouya Houshmand

Jiacong Sun

Marian Verhelst

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APA MLA BibTeX

Houshmand, P., Sun, J., Verhelst, M. (2023). Benchmarking and modeling of analog and digital SRAM in-memory computing architectures. https://arxiv.org/abs/2305.18335

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Informasi Jurnal

Tahun Terbit: 2023
Bahasa: en
Sumber Database: arXiv
Akses: Open Access ✓