arXiv Open Access 2022

Microprocessor Design with Dynamic Clock Source and Multi-Width Instructions

Keyu Chen Xuyi Hu Robert Killey
Lihat Sumber

Abstrak

This paper introduces a novel 32-bit microprocessor, based on the RISC-V instruction set architecture, is designed,utilising a dynamic clock source to achieve high efficiency, overcoming the limitations of hardware delays. In addition, the microprocessor is also aimed to operate with both base (32-bit) instructions and 16-bit compressed instructions. The testing of the design is carried out using ModelSim with an ideal result.

Topik & Kata Kunci

Penulis (3)

K

Keyu Chen

X

Xuyi Hu

R

Robert Killey

Format Sitasi

Chen, K., Hu, X., Killey, R. (2022). Microprocessor Design with Dynamic Clock Source and Multi-Width Instructions. https://arxiv.org/abs/2211.04455

Akses Cepat

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Tahun Terbit
2022
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en
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arXiv
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Open Access ✓