arXiv Open Access 2021

Fault-Resilient PCIe Bus with Real-time Error Detection and Correction

Mostafa Darvishi
Lihat Sumber

Abstrak

This paper presents a novel IP design for real-time fault/error detection and recovery on a peripheral component interconnect express (PCIe) which interfaces a host system (here a PC) to a slave design including processing system and memory transaction implemented on a Zynq Ultrascale Xilinx Kintex FPGA board (KCU105). The proposed IP design is capable of detection and correction of different types of PCIe errors on-the-fly

Topik & Kata Kunci

Penulis (1)

M

Mostafa Darvishi

Format Sitasi

Darvishi, M. (2021). Fault-Resilient PCIe Bus with Real-time Error Detection and Correction. https://arxiv.org/abs/2105.05739

Akses Cepat

Lihat di Sumber
Informasi Jurnal
Tahun Terbit
2021
Bahasa
en
Sumber Database
arXiv
Akses
Open Access ✓