arXiv Open Access 2016

Reliability-Aware Overlay Architectures for FPGAs: Features and Design Challenges

Mihalis Psarakis

Lihat Sumber

Abstrak

The FPGA overlay architectures have been mainly proposed to improve design productivity, circuit portability and system debugging. In this paper, we address the use of overlay architectures for building fault tolerant SRAM-based FPGA systems and discuss the main features and design challenges of a reliability-aware overlay architecture.

Topik & Kata Kunci

cs.AR

Penulis (1)

Mihalis Psarakis

Format Sitasi

APA MLA BibTeX

Psarakis, M. (2016). Reliability-Aware Overlay Architectures for FPGAs: Features and Design Challenges. https://arxiv.org/abs/1606.06452

Akses Cepat

Lihat di Sumber

Informasi Jurnal

Tahun Terbit: 2016
Bahasa: en
Sumber Database: arXiv
Akses: Open Access ✓