arXiv Open Access 2014

A Many-Core Overlay for High-Performance Embedded Computing on FPGAs

Mário Véstias Horácio Neto

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Abstrak

In this work, we propose a configurable many-core overlay for high-performance embedded computing. The size of internal memory, supported operations and number of ports can be configured independently for each core of the overlay. The overlay was evaluated with matrix multiplication, LU decomposition and Fast-Fourier Transform (FFT) on a ZYNQ-7020 FPGA platform. The results show that using a system-level many-core overlay avoids complex hardware design and still provides good performance results.

Topik & Kata Kunci

cs.AR

Penulis (2)

Mário Véstias

Horácio Neto

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APA MLA BibTeX

Véstias, M., Neto, H. (2014). A Many-Core Overlay for High-Performance Embedded Computing on FPGAs. https://arxiv.org/abs/1408.5401

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Informasi Jurnal

Tahun Terbit: 2014
Bahasa: en
Sumber Database: arXiv
Akses: Open Access ✓