arXiv
Open Access
2007
The Challenges of Hardware Synthesis from C-Like Languages
Stephen A. Edwards
Abstrak
MANY TECHNIQUES for synthesizing digital hardware from C-like languages have been proposed, but none have emerged as successful as Verilog or VHDL for register-transfer-level design. This paper looks at two of the fundamental challenges: concurrency and timing control.
Topik & Kata Kunci
Penulis (1)
S
Stephen A. Edwards
Akses Cepat
Informasi Jurnal
- Tahun Terbit
- 2007
- Bahasa
- en
- Sumber Database
- arXiv
- Akses
- Open Access ✓